Síntesi d'alt nivell de circuits asíncrons 

    Badia Sala, Rosa Maria (Fecha de defensa: 1994-07-20)

    (Català) A mesura que augmenta el nombre de transistors integrables en un xip, problemes com el desfasament del senyal de rellotge esdevenen cada cop més crítics. Altres avantatges com un consum més baix, una velocitat ...

    Smart and efficient sensor networks operation for 5G and beyond ecosystems 

    El Sayed, Ahmad Mohammad (Fecha de defensa: 2024-01-30)

    (English) Sensor Networks (SN) will play an integral role in Beyond 5G (B5G) ecosystems, especially for highly-distributed use cases and services such as Digital Twins (DT). Thus, the underlying transport network needs to ...

    Smart hardware designs for probabilistically-analyzable processor architectures 

    Benedicte Illescas, Pedro (Fecha de defensa: 2022-04-07)

    Future Critical Real-Time Embedded Systems (CRTES), like those is planes, cars or trains, require more and more guaranteed performance in order to satisfy the increasing performance demands of advanced complex software ...

    Smart memory management through locality analysis 

    Sánchez Navarro, Francisco Jesús (Fecha de defensa: 2001-11-06)

    Las memorias caché fueron incorporadas en los microprocesadores ya desde los primeros tiempos, y representan la solución más común para tratar la diferencia de velocidad entre el procesador y la memoria. Sin embargo, muchos ...

    Soft error mitigation techniques for future chip multiprocessors 

    Upasani, Gaurang R (Fecha de defensa: 2016-02-01)

    The sustained drive to downsize the transistors has reached a point where device sensitivity against transient faults due to neutron and alpha particle strikes a.k.a soft errors has moved to the forefront of concerns for ...

    Software caching techniques and hardware optimizations for on-chip local memories 

    Vujic, Nikola (Fecha de defensa: 2012-06-05)

    Despite the fact that the most viable L1 memories in processors are caches, on-chip local memories have been a great topic of consideration lately. Local memories are an interesting design option due to their many benefits: ...

    Software diagnostics for autonomous safety-critical control-systems based on artificial intelligence 

    Fernández Muñoz, Javier (Fecha de defensa: 2023-07-18)

    (English) Machine Learning (ML) systems allow the efficient implementation of functionalities that can be hard to program by traditional software due to the high spectrum of inputs that hinder the definition of a specific ...

    Specialization and reconfiguration of lightweight mobile processors for data-parallel applications 

    Duric, Milovan (Fecha de defensa: 2016-01-26)

    The worldwide utilization of mobile devices makes the segment of low power mobile processors leading in the entire computer industry. Customers demand low-cost, high-performance and energy-efficient mobile devices, which ...

    Spectral analysis of executions of computer programs and its applications on performance analysis 

    Casas Guix, Marc (Fecha de defensa: 2010-03-09)

    This work is motivated by the growing intricacy of high performance computing infrastructures. For example, supercomputer MareNostrum (installed in 2005 at BSC) has 10240 processors and currently there are machines with ...

    Speculative multithreaded processors 

    Marcuello Pascual, Pedro (Fecha de defensa: 2003-07-22)

    En esta tesis se estudia el modelo de ejecución de los procesadores multithreaded especulativos así como los requisitos necesarios para su implementación. El modelo de ejecución se basa en la inserción de instrucciones de ...

    Speculative Vectorization for Superscalar Processors 

    Pajuelo González, Manuel A. (Manuel Alejandro) (Fecha de defensa: 2005-11-24)

    Traditional vector architectures have been shown to be very effective in executing regular codes in which the compiler can detect data-level parallelism, i.e. repeating the same computation over different elements in the ...

    Statistical analysis and design of subthreshold operation memories 

    Rana, Manish (Fecha de defensa: 2016-10-18)

    This thesis presents novel methods based on a combination of well-known statistical techniques for faster estimation of memory yield and their application in the design of energy-efficient subthreshold memories. The emergence ...

    Strategies for internet route control: past, present and future 

    Yannuzzi, Marcelo (Fecha de defensa: 2007-12-19)

    Uno de los problemas más complejos en redes de computadores es el de proporcionar garantías de calidad y confiabilidad a las comunicaciones de datos entre entidades que se encuentran en dominios distintos. Esto se debe a ...

    Supporting the design of sequences of cumulative activities impacting on multiple areas through a data mining approach : application to design of cognitive rehabilitation programs for traumatic brain injury patients 

    García Rudolph, Alejandro (Fecha de defensa: 2016-02-04)

    Traumatic brain injury (TBI) is a leading cause of disability worldwide. It is the most common cause of death and disability during the first three decades of life and accounts for more productive years of life lost than ...

    Synthetic biology guidelines for diffusion based molecular communication 

    Assaf, Simon Sassine (Fecha de defensa: 2019-06-18)

    Nanotechnology is widely seen as having huge potential to bring benefits to many areas of research and application. Nowadays, research studies are focusing on realizing nano-machines on the order of nanometers in size. A ...

    Techniques for efficient and secure optical networks 

    Iqbal, Masab (Fecha de defensa: 2023-03-24)

    (English) Optical communication systems are widely adopted and responsible for transporting data traffic from access to metro to core networks supporting society’s information and communication functions. As the traffic ...

    Techniques for improving the performance of software transactional memory 

    Stipić, Srđan (Fecha de defensa: 2014-07-21)

    Transactional Memory (TM) gives software developers the opportunity to write concurrent programs more easily compared to any previous programming paradigms and gives a performance comparable to lock-based synchronization ...

    Techniques to improve concurrency in hardware transactional memory 

    Armejach Sanosa, Adrià (Fecha de defensa: 2014-06-13)

    Transactional Memory (TM) aims to make shared memory parallel programming easier by abstracting away the complexity of managing shared data. The programmer defines sections of code, called transactions, which the TM system ...

    Técnicas Algebraicas de Precondicionamiento para la resolución de Sistemas Lineales 

    Larrazabal Serrano, Germán Alberto (Fecha de defensa: 2002-05-31)

    Esta tesis se centra en el estudio de tecnicas de precondicionamiento para la resolucion de sistemas lineales de ecuaciones, provenientes de la resolucion de ecuaciones diferenciales en derivadas parciales. La caracteristica ...

    Técnicas para la mejora del join paralelo y del procesamiento de secuencias temporales de datos. 

    Aguilar Saborit, Josep (Fecha de defensa: 2006-07-14)

    A continuación se presenta la Tesis doctoral que lleva por título Técnicas para la mejora del join paralelo y del procesamiento de secuencias temporales de datos, llevada a cabo por Josep Aguilar Saborit y dirigida por el ...