Hardware design of task superscalar architecture 

    Yazdanpanah, Fahimeh (Fecha de defensa: 2014-06-26)

    Exploiting concurrency to achieve greater performance is a difficult and important challenge for current high performance systems. Although the theory is plain, the complexity of traditional parallel programming models in ...

    Hardware runtime management for task-based programming models 

    Tan, Xubin (Fecha de defensa: 2018-11-26)

    Task-based programming models allow programmers to express applications as a collection of tasks with dependences. They are simple to use and greatly improve programmability by using software runtimes to exploit task ...

    Hardware thread scheduling algorithms for single-ISA asymmetric CMPs 

    Markovic, Nikola (Fecha de defensa: 2015-12-22)

    Through the past several decades, based on the Moore's law, the semiconductor industry was doubling the number of transistors on the single chip roughly every eighteen months. For a long time this continuous increase in ...

    Hardware/software co-design for data-intensive genomics workloads 

    Cadenelli, Luca (Fecha de defensa: 2019-12-19)

    Since the last decade, the main components of computer systems have been evolving, diversifying, to overcome their physical limits and to minimize their energy footprint. Hardware specialization and heterogeneity have ...

    Hardware/software solutions to enable the use of high-performance processors in the most stringent safety-critical systems 

    Alcaide Portet, Sergi (Fecha de defensa: 2023-07-19)

    (English) Future Safety-Critical Systems require a boost in guaranteed performance in order to satisfy the increasing performance demands of the state-of-the-art complex software features. Ar1 approach to achieve these ...

    HERMESH : a geometrical domain composition method in computational mechanics 

    Eguzkitza Bazar, Ane Beatriz (Fecha de defensa: 2014-06-17)

    With this thesis we present the HERMESH method which has been classified by us as a a composition domain method. This term comes from the idea that HERMESH obtains a global solution of the problem from two independent ...

    Heterogeneity-awareness in multithreaded multicore processors 

    Acosta Ojeda, Carmelo Alexis (Fecha de defensa: 2009-07-07)

    During the last decades, Computer Architecture has experienced a great series of revolutionary changes. The increasing transistor count on a single chip has led to some of the main milestones in the field, from the release ...

    Hierarchical distributed fog-to-cloud data management in smart cities 

    Sinaeepourfard, Amir (Fecha de defensa: 2017-11-18)

    There is a vast amount of data being generated every day in the world with different formats, quality levels, etc. This new data, together with the archived historical data, constitute the seed for future knowledge discovery ...

    High performance instruction fetch using software and hardware co-design 

    Ramírez Bellido, Alejandro (Fecha de defensa: 2002-07-12)

    En los últimos años, el diseño de procesadores de altas prestaciones ha progresado a lo largo de dos corrientes de investigación: incrementar la profundidad del pipeline para permitir mayores frecuencias de reloj, y ensanchar ...

    High-level compiler analysis for OpenMP 

    Royuela Alcázar, Sara (Fecha de defensa: 2018-06-11)

    Nowadays, applications from dissimilar domains, such as high-performance computing and high-integrity systems, require levels of performance that can only be achieved by means of sophisticated heterogeneous architectures. ...

    High-performance and energy-efficient irregular graph processing on GPU architectures 

    Segura Salvador, Albert (Fecha de defensa: 2021-02-18)

    Graph processing is an established and prominent domain that is the foundation of new emerging applications in areas such as Data Analytics and Machine Learning, empowering applications such as road navigation, social ...

    HPC memory systems: Implications of system simulation and checkpointing 

    Sánchez Verdejo, Rommel (Fecha de defensa: 2022-02-04)

    The memory system is a significant contributor for most of the current challenges in computer architecture: application performance bottlenecks and operational costs in large data-centers as HPC supercomputers. With the ...

    HW/SW mechanisms for instruction fusion, issue and commit in modern u-processors 

    Deb, Abhishek (Fecha de defensa: 2012-05-03)

    In this thesis we have explored the co-designed paradigm to show alternative processor design points. Specifically, we have provided HW/SW mechanisms for instruction fusion, issue and commit for modern processors. We have ...

    Identifying and combating cyber-threats in the field of online banking 

    Aguilà Vilà, Jordi (Fecha de defensa: 2016-02-18)

    This thesis has been carried out in the industrial environment external to the University, as an industrial PhD. The results of this PhD have been tested, validated, and implemented in the production environment of Caixabank ...

    Identifying and diagnosing video streaming performance issues 

    Dimopoulos, Georgios (Fecha de defensa: 2018-11-27)

    On-line video streaming is an ever evolving ecosystem of services and technologies, where content providers are on a constant race to satisfy the users' demand for richer content and higher bitrate streams, updated set of ...

    Image and video object segmentation in low supervision scenarios 

    Bellver Bueno, Míriam (Fecha de defensa: 2021-03-26)

    Computer vision plays a key role in Artificial Intelligence because of the rich semantic information contained in pixels and the ubiquity of cameras nowadays. Multimedia content is on a rise since social networks have such ...

    Improved self-management of datacenter systems applying machine learning 

    Berral García, Josep Lluís (Fecha de defensa: 2013-11-22)

    Autonomic Computing is a Computer Science and Technologies research area, originated during mid 2000's. It focuses on optimization and improvement of complex distributed computing systems through self-control and ...

    Improving cache Behavior in CMP architectures throug cache partitioning techniques 

    Moretó Planas, Miquel (Fecha de defensa: 2010-03-19)

    The evolution of microprocessor design in the last few decades has changed significantly, moving from simple inorder single core architectures to superscalar and vector architectures in order to extract the maximum available ...

    Improving decision tree and neural network learning for evolving data-streams 

    Marrón Vida, Diego (Fecha de defensa: 2019-12-19)

    High-throughput real-time Big Data stream processing requires fast incremental algorithms that keep models consistent with most recent data. In this scenario, Hoeffding Trees are considered the state-of-the-art single ...

    Improving heterogeneous system efficiency : architecture, scheduling, and machine learning 

    Nemirovsky, Daniel A. (Fecha de defensa: 2017-10-30)

    Computer architects are beginning to embrace heterogeneous systems as an effective method to utilize increases in transistor densities for executing a diverse range of workloads under varying performance and energy ...