Now showing items 1-20 of 358

    A dependency-aware parallel programming model 

    Pérez Cáncer, Josep Maria (Date of defense: 2015-02-11)

    Designing parallel codes is hard. One of the most important roadblocks to parallel programming is the presence of data dependencies. These restrict parallelism and, in general, to work them around requires complex analysis ...

    A double full-stack architecture for multi-core quantum computers 

    Rodrigo Muñoz, Santiago (Date of defense: 2023-12-18)

    (English) Despite its tremendous potential, it is still unclear how quantum computing will scale to satisfy the requirements of its most powerful applications. Continued progress in the fabrication and control of qubits ...

    A Dynamic Validation Infrastructure for Interoperable Grid Services 

    Luna García, Jesús (Date of defense: 2008-05-05)

    Los encargados de recursos Grid pueden autorizar el acceso a sus elementos de cómputo por medio de procedimientos bien establecidos para los clientes, regularmente a través del uso de credenciales criptográficas que en su ...

    A framework for efficient execution of matrix computations 

    Herrero Zaragoza, Jose Ramón (Date of defense: 2006-07-07)

    Matrix computations lie at the heart of most scientific computational tasks. The solution of linear systems of equations is a very frequent operation in many fields in science, engineering, surveying, physics and ...

    A Middleware framework for self-adaptive large scale distributed services 

    Chacin Martínez, Pablo Jesus (Date of defense: 2011-07-21)

    Modern service-oriented applications demand the ability to adapt to changing conditions and unexpected situations while maintaining a required QoS. Existing self-adaptation approaches seem inadequate to address this challenge ...

    A Multi-core processor for hard real-time systems 

    Paolieri, Marco (Date of defense: 2011-11-04)

    The increasing demand for new functionalities in current and future hard real-time embedded systems, like the ones deployed in automotive and avionics industries, is driving an increment in the performance required in ...

    A novel access pattern-based multi-core memory architecture 

    Hussain, Tassadaq (Date of defense: 2014-12-18)

    Increasingly High-Performance Computing (HPC) applications run on heterogeneous multi-core platforms. The basic reason of the growing popularity of these architectures is their low power consumption, and high throughput ...

    A pragmatic approach toward securing inter-domain routing 

    Siddiqui, Muhammad Shuaib (Date of defense: 2014-12-19)

    Internet security poses complex challenges at different levels, where even the basic requirement of availability of Internet connectivity becomes a conundrum sometimes. Recent Internet service disruption events have made ...

    A prediction-based routing mechanism for optical and IP/MPLS networks 

    Marín Tordera, Eva (Date of defense: 2007-06-14)

    En los últimos años, las nuevas aplicaciones de Internet tales como aplicaciones multimedia, video a demanda, etc, requieren progresivamente mayor capacidad y garantías de calidad de servicio. En ese sentido el modelo de ...

    A trust-driven privacy architecture for vehicular ad-hoc networks 

    Serna-Olvera, Jetzabel Maritza (Date of defense: 2013-01-08)

    Vehicular Ad-Hoc NETworks (VANETs) are an emerging technology which aims to improve road safety by preventing and reducing traffic accidents. While VANETs offer a great variety of promising applications, such as, safety-related ...

    Acceleration of automatic speech recognition for low-power devices 

    Pinto Rivero, Dennis (Date of defense: 2022-11-09)

    (English) In this thesis, we study the challenges preventing ASR deployment on edge devices and propose innovations to tackle them, hopefully moving the technology a step forward to the future. First, we characterize ...

    Adaptable register file organization for vector processors 

    Ramírez Lazo, Cristóbal (Date of defense: 2022-04-04)

    Today there are two main vector processors design trends. On the one hand, we have vector processors designed for long vectors lengths such as the SX-Aurora TSUBASA which implements vector lengths of 256 elements (16384-bits). ...

    Adapting floating-point precision to accelerate deep neural network training 

    Osorio Ríos, John Haiber (Date of defense: 2023-10-18)

    (English) Deep Neural Networks (DNNs) have become ubiquitous in a wide range of application domains. Despite their success, training DNNs is an expensive task which has motivated the use of reduced numerical precision ...

    Adaptive execution environments for application servers 

    Carrera Pérez, David (Date of defense: 2008-07-08)

    El creixement experimentat tant per la web com per Internet en els últims anys ha potenciat l'introducció de servidors d'aplicacions dins de la majoria d'entorns d'execució distribuits. El servidors d'aplicacions web porten ...

    Adaptive learning-based resource management strategy in fog-to-cloud 

    Sengupta, Souvik (Date of defense: 2020-10-20)

    Technology in the twenty-first century is rapidly developing and driving us into a new smart computing world, and emerging lots of new computing architectures. Fog-to-Cloud (F2C) is among one of them, which emerges to ...

    Adaptive memory hierarchies for next generation tiled microarchitectures 

    Herrero Abellanas, Enric (Date of defense: 2011-07-05)

    Les últimes dècades el rendiment dels processadors i de les memòries ha millorat a diferent ritme, limitant el rendiment dels processadors i creant el conegut memory gap. Sol·lucionar aquesta diferència de rendiment és un ...

    Address Prediction and Recovery Mechanisms 

    Morancho Llena, Enric (Date of defense: 2002-07-11)

    Uno de los mayores retos que debe ser afrontado por los diseñadores de micro-procesadores es el de mitigar la gran latencia de las instrucciones de carga de datos en registros. Esta tesis analiza una de las posibles ...

    Addressing practical challenges for anomaly detection in backbone networks 

    Paredes Oliva, Ignasi (Date of defense: 2013-07-29)

    Network monitoring has always been a topic of foremost importance for both network operators and researchers for multiple reasons ranging from anomaly detection to tra c classi cation or capacity planning. Nowadays, as ...

    Advanced analytics through FPGA based query processing and deep reinforcement learning 

    Malazgirt, Gorker Alp (Date of defense: 2019-02-12)

    Today, vast streams of structured and unstructured data have been incorporated in databases, and analytical processes are applied to discover patterns, correlations, trends and other useful relationships that help to take ...

    Advanced hardware prefetching in virtual memory systems 

    Vavouliotis, Georgios (Date of defense: 2023-09-12)

    (English) Despite groundbreaking technological innovations, the disparity between processor and memory speeds (known as Memory Wall) is still a major performance obstacle for modern systems. Hardware prefetching is a ...