Cache designs for reliable hybrid high and ultra-low voltage operation 

    Maric, Bojan (Fecha de defensa: 2014-05-16)

    Increasing demand for implementing highly-miniaturized battery-powered ultra-low-cost systems (e.g., below 1 USD) in emerging applications such as body, urban life and environment monitoring, etc., has introduced many ...

    Cache memory design in the FinFET era 

    Jakšić, Zoran (Fecha de defensa: 2015-07-23)

    The major problem in the future technology scaling is the variations in process parameters that are interpreted as imperfections in the development process. Moreover, devices are more sensitive to the environmental changes ...

    Castell: a heterogeneous cmp architecture scalable to hundreds of processors 

    Cabarcas Jaramillo, Felipe (Fecha de defensa: 2011-09-19)

    Technology improvements and power constrains have taken multicore architectures to dominate microprocessor designs over uniprocessors. At the same time, accelerator based architectures have shown that heterogeneous ...

    Channel assignment protocols for multi-radio multi-channel wireless mesh netwworks 

    Amiri Nehzad, Maryam (Fecha de defensa: 2013-01-30)

    The increasing demand for large and low cost wireless coverage, ranging from campus to city wide areas, has motivated a high interest in multi-hop communications with Wireless Mesh Networks (WMN) based on IEEE 802.11s as ...

    Characterization, design and re-optimization on multi-layer optical networks 

    Ruiz Ramírez, Marc (Fecha de defensa: 2012-12-21)

    L'augment de volum de tràfic IP provocat per l'increment de serveis multimèdia com HDTV o vídeo conferència planteja nous reptes als operadors de xarxa per tal de proveir transmissió de dades eficient. Tot i que les xarxes ...

    Circuit designs for increasing reliability and reducing energy 

    Seyedi, Azamolsadat (Fecha de defensa: 2016-02-02)

    Computing technology has witnessed an inimitable progress in the last decades which is the result of CMOS technology scaling commensurate with Moore's law. Transistor feature sizes have shrunk to half at each generation, ...

    Co-designed solutions for overhead removal in dynamically typed languages 

    Dot Artigas, Gem (Fecha de defensa: 2016-07-26)

    Dynamically typed languages are ubiquitous in today's applications. These languages ease the task of programmers but introduce significant runtime overheads since variables are neither declared nor bound to a particular ...

    Code optimizations for narrow bitwidth architectures 

    Bhagat, Indu (Fecha de defensa: 2012-02-23)

    This thesis takes a HW/SW collaborative approach to tackle the problem of computational inefficiency in a holistic manner. The hardware is redesigned by restraining the datapath to merely 16-bit datawidth (integer datapath ...

    Code-Centric Domain Isolation : a hardware/software co-design for efficient program isolation 

    Vilanova García, Lluís (Fecha de defensa: 2016-01-14)

    Current software systems contain a multitude of software components: from simple libraries to complex plugins and services. System security and resiliency depends on being able to isolate individual components onto separate ...

    Communication reduction techniques in numerical methods and deep neural networks 

    Zhuang, Sicong (Fecha de defensa: 2019-11-28)

    Inter-node communication has turned out to be one of the determining factors of the performance on modern HPC systems. Furthermore, the situation only gets worse with the ever-incresing size of the cores involved. Hence, ...

    Compiler and runtime based parallelization & optimization for GPUs 

    Ozen, Guray (Fecha de defensa: 2018-12-13)

    Graphics Processing Units (GPU) have been widely adopted to accelerate the execution of HPC workloads due to their vast computational throughput, ability to execute a large number of threads inside SIMD groups in parallel ...

    Computación difusa 

    Álvarez Martínez, Carlos (Fecha de defensa: 2007-05-16)

    Esta tesis se enmarca en el ámbito de las técnicas de mejora de la eficiencia de ejecución (disminución del consumo y aumento de la velocidad) en el diseño de procesadores orientados a la ejecución de aplicaciones multimedia. ...

    Computer-language based data prefetching techniques 

    Touma, Rizkallah (Fecha de defensa: 2019-01-25)

    Data prefetching has long been used as a technique to improve access times to persistent data. It is based on retrieving data records from persistent storage to main memory before the records are needed. Data prefetching ...

    Connectivity sharing for wireless mesh networks 

    Batbayar, Khulan (Fecha de defensa: 2022-02-07)

    Internet access is still unavailable to one-third of the world population due to the lack of infrastructure, high cost, and the digital divide. Many access-limited communities opt for shared Internet access where they build ...

    ConOps for a safe integration of multi-RPAS operations in civil airspace 

    Fas Millán, Miguel Ángel (Fecha de defensa: 2019-11-22)

    The gradual integration of remotely piloted aircraft systems (RPAS) in civil airspace, sharing airways with commercial flights, is expected to be completed once the legal issues and those regarding the unmanned traffic ...

    Contributions to network planning and operation of Flex-Grid/SDM optical core networks 

    Rumipamba Zambrano, Rubén Darío (Fecha de defensa: 2019-03-14)

    The ever demanding bandwidth requirements for supporting emerging telecom services such as ultra-high-definition video streaming, cloud computing, connected car, virtual/augmented reality, etc., bring to the fore the ...

    Contributions to routing scalability and QoS assurance in cloud data transport networks based on the recursive internetwork architecture 

    León Gaixas, Sergio (Fecha de defensa: 2018-06-29)

    With an increasing number of devices and heterogeneous distributed applications, it is becoming evident that service delivered by the current Internet fall short to supply the actual Quality of Service (QoS) requirements ...

    Convergence of deep learning and high performance computing: challenges and solutions 

    Njoroge Kahira, Albert (Fecha de defensa: 2021-07-30)

    Deep Learning has achieved outstanding results in many fields and led to groundbreaking discoveries. With the steady increase in datasets and model sizes, there has been a recent surge in Machine Learning applications in ...

    Convergence of high performance computing, big data, and machine learning applications on containerized infrastructures 

    Liu, Peini (Fecha de defensa: 2023-07-17)

    (English) The convergence of High Performance Computing (HPC), Big Data (BD), and Machine Learning (ML) in the computing continuum is being pursued in earnest across the academic and industry. We envision virtualization ...

    Cooperación entre la aplicación y el kernel para la planificación de flujos, en sistemas multiprocesadores, como soporte al paralelismo 

    Gil Gómez, Maria Luisa (Fecha de defensa: 1994-07-04)

    El objetivo de nuestro trabajo ha sido defender la tesis de que, para los entornos de trabajos actuales, multiprocesador, una opción válida para obtener el mejor rendimiento de las aplicaciones paralelas de propósito general ...