Now showing items 153-172 of 357

    Heterogeneity-awareness in multithreaded multicore processors 

    Acosta Ojeda, Carmelo Alexis (Date of defense: 2009-07-07)

    During the last decades, Computer Architecture has experienced a great series of revolutionary changes. The increasing transistor count on a single chip has led to some of the main milestones in the field, from the release ...

    Hierarchical distributed fog-to-cloud data management in smart cities 

    Sinaeepourfard, Amir (Date of defense: 2017-11-18)

    There is a vast amount of data being generated every day in the world with different formats, quality levels, etc. This new data, together with the archived historical data, constitute the seed for future knowledge discovery ...

    High performance instruction fetch using software and hardware co-design 

    Ramírez Bellido, Alejandro (Date of defense: 2002-07-12)

    En los últimos años, el diseño de procesadores de altas prestaciones ha progresado a lo largo de dos corrientes de investigación: incrementar la profundidad del pipeline para permitir mayores frecuencias de reloj, y ensanchar ...

    High-level compiler analysis for OpenMP 

    Royuela Alcázar, Sara (Date of defense: 2018-06-11)

    Nowadays, applications from dissimilar domains, such as high-performance computing and high-integrity systems, require levels of performance that can only be achieved by means of sophisticated heterogeneous architectures. ...

    High-performance and energy-efficient irregular graph processing on GPU architectures 

    Segura Salvador, Albert (Date of defense: 2021-02-18)

    Graph processing is an established and prominent domain that is the foundation of new emerging applications in areas such as Data Analytics and Machine Learning, empowering applications such as road navigation, social ...

    HPC memory systems: Implications of system simulation and checkpointing 

    Sánchez Verdejo, Rommel (Date of defense: 2022-02-04)

    The memory system is a significant contributor for most of the current challenges in computer architecture: application performance bottlenecks and operational costs in large data-centers as HPC supercomputers. With the ...

    HW/SW mechanisms for instruction fusion, issue and commit in modern u-processors 

    Deb, Abhishek (Date of defense: 2012-05-03)

    In this thesis we have explored the co-designed paradigm to show alternative processor design points. Specifically, we have provided HW/SW mechanisms for instruction fusion, issue and commit for modern processors. We have ...

    Identifying and combating cyber-threats in the field of online banking 

    Aguilà Vilà, Jordi (Date of defense: 2016-02-18)

    This thesis has been carried out in the industrial environment external to the University, as an industrial PhD. The results of this PhD have been tested, validated, and implemented in the production environment of Caixabank ...

    Identifying and diagnosing video streaming performance issues 

    Dimopoulos, Georgios (Date of defense: 2018-11-27)

    On-line video streaming is an ever evolving ecosystem of services and technologies, where content providers are on a constant race to satisfy the users' demand for richer content and higher bitrate streams, updated set of ...

    Image and video object segmentation in low supervision scenarios 

    Bellver Bueno, Míriam (Date of defense: 2021-03-26)

    Computer vision plays a key role in Artificial Intelligence because of the rich semantic information contained in pixels and the ubiquity of cameras nowadays. Multimedia content is on a rise since social networks have such ...

    Improved self-management of datacenter systems applying machine learning 

    Berral García, Josep Lluís (Date of defense: 2013-11-22)

    Autonomic Computing is a Computer Science and Technologies research area, originated during mid 2000's. It focuses on optimization and improvement of complex distributed computing systems through self-control and ...

    Improving cache Behavior in CMP architectures throug cache partitioning techniques 

    Moretó Planas, Miquel (Date of defense: 2010-03-19)

    The evolution of microprocessor design in the last few decades has changed significantly, moving from simple inorder single core architectures to superscalar and vector architectures in order to extract the maximum available ...

    Improving decision tree and neural network learning for evolving data-streams 

    Marrón Vida, Diego (Date of defense: 2019-12-19)

    High-throughput real-time Big Data stream processing requires fast incremental algorithms that keep models consistent with most recent data. In this scenario, Hoeffding Trees are considered the state-of-the-art single ...

    Improving heterogeneous system efficiency : architecture, scheduling, and machine learning 

    Nemirovsky, Daniel A. (Date of defense: 2017-10-30)

    Computer architects are beginning to embrace heterogeneous systems as an effective method to utilize increases in transistor densities for executing a diverse range of workloads under varying performance and energy ...

    Improving multithreading performance for clustered VLIW architectures. 

    Gupta, Manoj (Date of defense: 2013-06-14)

    Very Long Instruction Word (VLIW) processors are very popular in embedded and mobile computing domain. Use of VLIW processors range from Digital Signal Processors (DSPs) found in a plethora of communication and multimedia ...

    Improving prefetching mechanisms for tiled CMP platforms 

    Torrents Lapuerta, Martí (Date of defense: 2016-11-28)

    Recently, high performance processor designs have evolved toward Chip-Multiprocessor (CMP) architectures to deal with instruction level parallelism limitations and, more important, to manage the power consumption that is ...

    Improving resource efficiency in virtualized datacenters 

    Amaral, Marcelo (Date of defense: 2019-04-29)

    In recent years there has been an extraordinary growth of the Internet of Things (IoT) and its protocols. The increasing diffusion of electronic devices with identification, computing and communication capabilities is ...

    Improving the effective use of multithreaded architectures : implications on compilation, thread assignment, and timing analysis 

    Radojković, Petar (Date of defense: 2013-07-19)

    This thesis presents cross-domain approaches that improve the effective use of multithreaded architectures. The contributions of the thesis can be classified in three groups. First, we propose several methods for thread ...

    Improving the efficiency of multicore systems through software and hardware cooperation 

    Jiménez Pérez, Víctor Javier (Date of defense: 2016-10-20)

    Increasing processors' clock frequency has traditionally been one of the largest drivers of performance improvements for computing systems. In the first half of the 2000s, however, it became clear that continuing to increase ...

    Improving the performance and energy-efficiency of virtual memory 

    Karakostas, Vasileios (Date of defense: 2016-04-18)

    Virtual memory improves programmer productivity, enhances process security, and increases memory utilization. However, virtual memory requires an address translation from the virtual to the physical address space on every ...